Builder ffmpegsos-solaris10-sparc Build #12591

Results:

Failed shell_2 shell_3 shell_4 shell_5

SourceStamp:

BuildSlave:

Reason:

The SingleBranchScheduler scheduler named 'schedule-ffmpegsos-solaris10-sparc' triggered this build

Steps and Logfiles:

1. git update ( 21 secs )
   1. stdio
2. shell 'gsed -i ...' ( 0 secs )
   1. stdio
3. shell_1 'gsed -i ...' ( 0 secs )
   1. stdio
4. shell_2 'gsed -i ...' failed ( 0 secs )
   1. stdio
5. shell_3 './configure --samples="../../../ffmpeg/fate-suite" ...' failed ( 25 secs )
   1. stdio
   2. config.log
6. shell_4 'gmake fate-rsync' failed ( 1 secs )
   1. stdio
7. shell_5 '../../../ffmpeg/fate.sh ../../../ffmpeg/fate_config_sos.sh' failed ( 1 secs )
   1. stdio
   2. configure.log
   3. compile.log
   4. test.log

Build Properties:

Forced Build Properties:

Responsible Users:

1. Rémi Denis-Courmont

   remiohnoyoudont@remlab.net

Timing:

All Changes:

:

1. Change #252771

   Category	ffmpeg
   Changed by	Rémi Denis-Courmont <remiohnoyoudont@remlab.net>
   Changed at	Fri 19 Dec 2025 18:50:56
   Repository	https://git.ffmpeg.org/ffmpeg.git
   Project	ffmpeg
   Branch	master
   Revision	8dccb380cf956813eaa34793f1c1972a5b05af35

   Comments

   lavc/mathops: simplify mid_pred()
   This reduces the minimum instruction emission for mid_pred()
   (i.e. median of 3) down to:
   - 3 comparisons and 4 conditional moves, or
   - 4 min/max.
   
   With that the compiler can eliminate any branch. This optimal
   situation is attainable with Clang 21 on Arm64, RVA22 and x86,
   with GCC 15 on Arm64 and x86 (RVA22 goes from 2 to 1 branch).
   These optimisations also work on Arm32 and LoongArch.
   
   The same algorithm is already implemented via inline assembler for some
   architectures such as x86 and Arm32, but notably not Arm64 and RVA22.
   Besides, using C code allows the compiler to schedule instruction
   properly.
   
   Even on architectures with neither conditional moves nor min/max, this
   leads to a visible performance improvement for C code, as seen here for
   RVA20 code running on SiFive-U74:
   
   Before:
   sub_median_pred_c:                                    1657.5 ( 1.00x)
   sub_median_pred_rvb_b:                                 875.9 ( 1.89x)
   
   After:
   sub_median_pred_c:                                    1331.9 ( 1.00x)
   sub_median_pred_rvb_b:                                 881.8 ( 1.51x)
   
   Note that this commit leaves the x86 and Arm32 code intact so it has
   no effects on those ISA's.

   Changed files

   • libavcodec/mathops.h

2. Change #252772

   Category	ffmpeg
   Changed by	Rémi Denis-Courmont <remiohnoyoudont@remlab.net>
   Changed at	Fri 19 Dec 2025 18:56:13
   Repository	https://git.ffmpeg.org/ffmpeg.git
   Project	ffmpeg
   Branch	master
   Revision	ccd7e66f9e2cf41b06b5f44e82843ecc03dbb2f4

   Comments

   lavc/mathops: remove bespoke Arm mid_pred()
   The C codegen is as good if not slightly better than the assembler at
   this point.

   Changed files

   • libavcodec/arm/mathops.h

3. Change #252773

   Category	ffmpeg
   Changed by	Rémi Denis-Courmont <remiohnoyoudont@remlab.net>
   Changed at	Fri 19 Dec 2025 18:56:13
   Repository	https://git.ffmpeg.org/ffmpeg.git
   Project	ffmpeg
   Branch	master
   Revision	55200f999c1e85bc68785742528151193c2f4bce

   Comments

   lavc/mathops: R-V B optimisation for mid_pred
   If Zbb is enabled at compilation (e.g. Ubuntu), the compiler should
   compile the new C mid_pred() function correctly. But if Zbb is *not*
   enabled (e.g. Debian), then we can at least fallback at run-time.
   
   On SiFive-U74, before:
   sub_median_pred_c:                                    1331.9 ( 1.00x)
   sub_median_pred_rvb_b:                                 881.8 ( 1.51x)
   
   After:
   sub_median_pred_c:                                    1133.1 ( 1.00x)
   sub_median_pred_rvb_b:                                 875.7 ( 1.29x)

   Changed files

   • libavcodec/mathops.h
   • libavcodec/riscv/mathops.h